[sdiy] Quad s&h math verification

[Karl Ekdahl]

Hi list, i'm just trying to figure out wheter the Quad
S&H i designed 'n built just works out of sheer luck
or if i'm actually learning stuff (reading The Art of
Electronics all the time), therefore i'd like to
verify my maths...

Basic s&h's built around a 4066 as FET switch, a 1uF
cap and TL074's. Input is fed from a TL072 follower.
Schematic:
http://www.sdiy.org/knas/ars2/schematics/quadsh.gif

Max voltage swing is 0 - 5v, maximum tolerable droop
is 1mV (yes it's a lot). Worst case leakage from 4066
+ input-bias from TL074 is 200nA + 200pA = 2002nA, i
used the formula dt = (C * dV)/I to calculate droop
time for 1mV like dt = (0.000001*0.001)/0.0000002002
~= 0.005 seconds. 

For the charge time i assumed 0-5v charge @ 20mA from
the TL072, the 4066 having a ON resistance of 350ohms.
Using U/I=R on 5/0.02=250 i get total resistance of
600ohms thus U/R=I -> 5/600=0.00833A supply current.
Again using dt = (C * dV)/I i get dt =
(0.000001*5)/0.0083333 ~= 0.0006 seconds charge time.

So i need to refresh every s&h every 5mS and the
refresh period has to be at least 0.6mS long.

phew... so, am i totally out biking (i used that
before i read it Karl!) or am i correct? Any case, it
works just fine, can't hear any VCO "flutter" or other
inconsistencies.

thanks

Karl