[sdiy] PTH vias

[Vesa Lahteenmaki]

>Hi,
>
>Does anyone know whether it's a bad idea to cover PTH vias with solder 
>resist?  By default my PCB software leaves a gap in the solder resist which 
>means that you can't place silkscreen legend on top of a via.
>
>Looking at some commercial PCBs I see that quite often vias are not covered 
>with solder resist.  Is there an electrical reason for this?
>
>Nowadays my PCBs are Immersion Silver finish (which is a 1 micron thick 
>plating of silver on the copper) if that makes a difference?
>
>TIA,
>Seb
>
Certainly not recommended ! Would cause several problems, search with 
keyword "via tenting".
Normal liquid soldermask would disapper into the hole anyway, so it would 
not really cover the hole . Via holes are often used as testpoints during 
testing phase after assembly so that is also a reason not to cover them. 
Sometimes some or all vias must be filled for in circuit testing ( board 
held in place with vacuum ), but this is a special process ( via plugging ) 
and done on one side only. Otherwise process chemicals might be trapped in 
the hole and could cause failure later.

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