SV: Re: [sdiy] Xilinx 3E webpack and its gotcha's!

[Magnus Danielson]

From: James Patchell <patchell at cox.net>
Subject: Re: SV: Re: [sdiy] Xilinx 3E webpack and its gotcha's!
Date: Wed, 14 Jun 2006 07:50:12 -0700
Message-ID: <5.2.1.1.2.20060614074713.0184f990 at pop.west.cox.net>

> I use both....they both do the same thing...they both generate the same 
> logic...so, just pick one.
> 
> I myself...when given a choice, I use Verilog...all of the jobs I have done 
> have required Verilog...but who knows..

I have somehow been given the impression that Verilog is strong in the USA and
VHDL is strong in Europe. Assuming that this is fairly "right", one may
experience one of them as being more common.

Cheers,
Magnus