[sdiy] Decoupling caps x3?

Seb Francis seb at burnit.co.uk
Wed Jun 14 02:50:15 CEST 2006


Hi Harry,

> The best idea is to decouple with the absolute minimum
> loop area... and to use capacitors with the lowest
> possible self-inductance... namely monoltyhic ceramic
> SMT caps for the highest frequencies.
>
>   

By monolithic ceramic, do you mean multilayer ceramic chip capacitors?

> Ken Stone did some interesting things in the
> "MorphLag"
> layout he did from my design. He put the decoupling
> caps on the back of the board and used SMT... it is a
> very effective design.
>
>   

Well most of the ICs for my current project are SMT anyway, but I 
suppose since everything will be hand soldered there's no reason why I 
can put the SMT caps on the back of where the ICs are.

> If you use the Bissell / Patchell method of .1uF
> decoupling caps, on every power pin of every IC you
> can probably get away with just using .1uF caps (at
> audio frequencies) there will be enough total
> capacitance you will not miss the 1uF caps.  You may
> also need to soft-start your designs  (we get into
> several hundred
> decoupling caps !!!)
>   

So the rule of thumb would be ...
"If the lights in the house dim when you switch your synth on you've got 
enough decoupling caps!"
;)

Seb





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