[sdiy] Xilinx 3E board comments

[Paul Maddox]

Jeff,

<lots of questions deleted>
Basically you need to think of the FPGA as a *HUGE* pile of logic gates, in 
their simplist form, nand, and, xor, add, etc.
You then simply 'interconnect' these modules.
The process is simplified by the use of VHDL, which looks at the code you've 
written and 'joins' the various parts together.

the pico/micro blaze are simply a pre-compiled 'set of connections' that you 
load up.
If you had access to the source code, you could even do things like take out 
a serial port, add in a math unit and so on.

So you can dasy chain them (limited by number of IO pins and speed of pins)
you can attach what you want (I've seen FPGA IDE interfaces, CF interfaces, 
SDRAM interfaces)

> I've read a few of the .pdf's at xilinx now, and I can see that there
> is a learning curve to their documentation (and where they keep their
> documentation).

there is a BIG learning curve and it's pretty steep, but it's the same with 
any technology that is 'new' to yourself.

> Lastly I assume that once you have a finished design on a FPGA you
> would move on to another process that creates a commercial product
> from the design ie:  a NordLead may have been created using a FPGA,
> but there is not a FPGA in a NordLead.

there are two ways these things go normally
1) the design goes into an ASIC (custom chip)
2) the design stays in an FPGA and gets used 'as is'

> Ok, one more:  In terms of processing power where do dsp chips fit in?
> Would I be achieving a similar result using a uC and some DSP chips,
> given that I sacrifice a great deal of flexibilty?

different thing, a DSP chip is basically an MCU with a very very fast/funky 
math unit attached.
You couldn't, for instance, write your own 'bespoke' logic structure in such 
a thing.
I mean you couldn't include two small micros, a math unit, a video generator 
and an IDE interface with a DSP.

> Oh yea.. might as well add granular
> capabilty to it.. and vectors... hell, why not wave sequencing..
> anything else?

in practice you're limited by three things
1) your skill with VHDL
2) your imagination
3) the amount of logic gates on the device you're using.

Paul