[sdiy] Xilinx 3E board comments

James Patchell patchell at cox.net
Fri Jun 9 17:02:00 CEST 2006


I originally wrote that code for use at work.  I could not bring the code 
out of the building...so I re-created it from memory.  The one I did at 
work functions as advertised.  I have not had a chance yet to make sure my 
memory was good...

Sound quality is about....8 to 12 bits....it is surprisingly good, 
considering what it is.

I still want to make a board that has 192KHz Delta Sigma Dacs....

At 03:26 PM 6/9/2006 +0100, Paul Maddox wrote:
>Eric,
>
>>Good point. That gives you ~0.01Hz resolution.
>
>yep, 0.01hz is adequate, you could easily increase the bit depth of the 
>accumulator to get greater accuracy.
>
>>It also puts Nyquist at 25 MHz, so the aliased harmonics will be down 
>>~67dB worst-case by the time they fold back into the audio range. Not 
>>quite CD-quality, but better than the 45dB I was seeing.
>
>ahh, but carefull :-)
>the monowave has an update rate of 1Mhz, so a nyquest of 500khz, but you 
>need to get above 4Khz pitch before you can begin to hear the artifacts.. 
>but by then a 4Khz note is begining to hurt my ears...
>Given that few people would play a note above 6Khz for any length of time, 
>I reckon a 50Mhz update rate is as good as 'alias free' as you'll ever get.
>
>>Then you either have to build a (fairly simple) decimating FIR to get the 
>>sample rate down to the audio range to output through a good-quality DAC, 
>>or use a Delta-Sigma converter running in logic at full speed like the 
>>one Jim Patchell has on the fpga.synth.net site. (has anyone tried that yet?)
>
>to my knowledge, no, nobody has tried it.. I know Jim synthesised it...
>
>Paul

         -Jim
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