[sdiy] Last chance for 4xD PCB order

[Seb Francis]

Hi Andre,

Andre Majorel wrote:
> On 2006-07-16 14:36 +0100, Seb Francis wrote:
>
>   
>> I'm going to order the 4xD PCBs tomorrow.
>>     
>
> I'll bite, kind of.
>
> Unlike many on this list, I do not find hardware DSP compelling.
> If I want to do DSP, I'll do it in software, as it's quicker,
> cheaper and IMO generally better. No flames please, I'm entitled
> to my opinions, no matter how obviously clueless they seem to
> you. :-)
>
>   

I partially agree with you here (I also use plenty of VST plugins), but 
I do like dedicated boxes that do a specific job well, with 
zero-latency, plenty of knobs and dedicated I/O.  Since lots of my 
hardware is analog and can never (not yet anyway) be reproduced 
faithfully inside my PC, having external digital effects with 
zero-latency and dedicated I/O makes a lot of sense.

Anyway, enough opinion and on with the actual answers to your questions ;)

> Seb you have already said that VC could be added. I'll try to be
> a bit more specific this time. What would it take (number of 4xD
> PCBs and approx. magnitude of software and hardware changes) to
> have :
>
>   

I'll be general and say the following:

Each 4xD PCB is capable of 4 independent mono delays, and 4 CV inputs.  
Architecturally this is split in half with 2 completely separate 
(although can be linked via SPI) halves consisting of a dsPIC, a stereo 
CODEC and an SRAM.  The PIC that handles the UI is shared between both 
halves.

In terms of hardware changes: the PCB is fully designed for up to 4 CV 
inputs - you simply need to include the buffer opamps and resistors, and 
set the links accordingly.

Software-wise, the changes are pretty minimal:

(1) You need to take care of the fact that the highest SRAM address bits 
15&16 can no longer be set at the same time as all the other bits 
(because these pins of the dsPIC are now used for analog input).  This 
means something like an extra 4 instruction cycles per word read/write 
(to set the alternative address pins), or address only a part of the 
SRAM.  I haven't finished the software yet, but I'd imagine there is 
plenty of spare CPU time to do it the first way and maintain full delay 
time (670ms per channel).

(2) You need to add an interrupt service routine to sample the analog 
inputs at the desired sampling rate (hardware-wise this is 100ksps per 
CV, but maybe the available CPU time would make a lower limit - I didn't 
work it out).  This ISR would then simply call the same internal 
function that gets called when a parameter change is received over SPI 
from the UI PIC.  The limitations are that there is no bi-directional 
communication between the dsPICs and the UI PIC so any parameter changes 
made by CV would not update the LED display, internally held rotary 
encoder positions or flash RAM.  I did think about allowing the UI PIC 
to receive CV control, but I decided it would be better to sample the 
CVs directly on the dsPICs, allowing higher sampling rate and avoid the 
SPI bottleneck.

> - two separate delays with independent VC delay (module has 2 CV
>   in sockets),
>
>   

This is 1/2 of a 4xD

> - three of the same,
>   

This is 3/4 of a 4xD

> - six of the same,
>   

This is 1.5 4xDs

> I was about to ask, how about the same with added VC feedback
> amount and VC feedback polarity but since the 4xD has send and
> return sockets per delay channel, I guess VC feedback amount and
> VC feedback polarity can be taken care of with one external
> 4-quadrant multiplier per channel, right ?
>   

I purposely left the feedback in the analog domain to allow all kinds of 
side chain processing.  It could also be done in software, but the 
software I'm writing won't include this.

And yes, as you say, a VC 4-quadrant multiplier per channel will give 
you the voltage control you desire.  Or if you don't need to reverse 
polarity then a normal VCA will work.

> If adding VC delay involves sacrificing rotary encoders, that's
> fine ; once I have VC, I expect I won't have any use for them
> except perhaps a coarse delay range control per channel (and
> even that might not be needed at all).
>
>   

Well, this is another option: sacrificing rotary encoders will give you 
2 CV inputs to the UI PIC per sacrificed encoder (up to a maximum of 8 
CVs).  But doing it this way you would need to provide your own CV input 
buffers off-board, and the achievable max sampling rate and resolution 
would be lower.  On the plus side though, you could update the LED 
display, internally held rotary encoder positions and flash RAM from the 
CVs.

Hope this is enough info .. any questions, just ask :)

Seb