[sdiy] Triggering problems with VC ADSR

Seb Francis seb at burnit.co.uk
Sat Jan 14 20:30:56 CET 2006


Dave Kendall wrote:

>Hi All.
>
>I'm trying to modify an EFM VC RADSR so that it accepts a re-trigger. Is
>anyone familiar with this design?
>It's a CMOS4052 based design. Pin 9 of the 4052 follows the gate signal, and
>a brief high pulse at pin 10 resets it back to the start again. However the
>trigger pulse from my Paia Midi2CV8 (5ms, 0 to +10V) is not acting in the
>same way as the circuit's internal re-set.
>Looking on the scope, the internally generated reset pulse looks to be
>longer than that generated internally.
>
>Anyone know a circuit that can increase the length of a short pulse?
>
>  
>
You can do with a 40106 + diode + cap + resistor ..
http://www.musicfromouterspace.com/analogsynth/mmlogic.html

Or you could use an opamp (as a comparator) instead of the 2x 40106 gates.

Seb




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