SV: Re: [sdiy] d/a, voltage references & multiplexing considerations

[Antti Huovilainen]

On Tue, 3 Jan 2006, Karl Ekdahl wrote:

> I was thinking about using the clock out from a PIC,
> should be stable enough i guess...?

I wouldn't blindly trust any such internal oscillator circuit. IIRC, the 
jitter should be max tens of picoseconds. Safe bet would be to use 
dedicated low jitter crystal oscillator module which several companies 
make. No idea where to actually buy one though.

> sorry, could you elaborate on the phase offset? i
> didn't really get that...

Basically it means that if you're feeding the same signal to both 
channels, one will always be slightly ahead of other leading to high 
frequency loss if the signals are ever mixed together.

How are you going to feed the DAC?
If you're not using oversampling, you should implement a high freq 
emphasis filter to cancel the effect of the "zero-order hold" at the 
output (basically the output attenuates the spectrum -3 dB at nyquist as 
the output is not impulse train but instead a step function).

> problem is it doesn't say what value Rf has...

Current output configuration output impedance is listed as 1.7 kohm and 
output current as +-1 mA. Combining these with facts from voltage output 
config (+-3 V) implies that Rf should be 3 kohm.
For voltage output config you'd connect Iout and SJ together and Rf and 
Vout together and place a cap from Vout to SJ.

Antti

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