SV: Re: [sdiy] d/a, voltage references & multiplexing considerations

[Karl Ekdahl]

Antti,

*snip* 
> You'll also need stable jitter-free master clock.
> Unfortunately I have no 
> idea how good your typical run of the mill crystal
> oscillator circuit is 
> going to be at that.

I was thinking about using the clock out from a PIC,
should be stable enough i guess...? 

> > and circuits for that. Also i'm thinking that
> since it supports 16x 
> > oversample i could multiplex it into a number of
> outs using sample and 
> > holds, is this a bad idea?  Also, i'm a little
> confused as how to wire
> 
> This will be tricky. You will have phase offset
> between the channels and 
> your sample & hold must be linear enough (100dB THD
> is not easy), fast 
> enough and low feedthrough enough. I wouldn't do
> this.

sorry, could you elaborate on the phase offset? i
didn't really get that...

> 
> > the 1861 for voltage out, the only thing i found
> on the net was someone 
> > hooking up Iout to SJ and RF to Vout and then tie
> both together with a 
> > cap of mysterious value.
> 
> The datasheet shows internal Rf between the pins, so
> a capacitor would act 
> as simple lowpass filter (possibly needed for
> compensation too).

problem is it doesn't say what value Rf has...

> Antti - By no means an expert in AD/DA but has read
> lots about what can go 
> wrong there

thanks!!

Karl