[sdiy] PCB layout rules

[Joe Grisso]

> For sdiy I think you better off with the "let ground abound" approach
> rather than chopping
> up your planes.
>
> (* jcl *)
>
> --
> http://www.luciani.org
>

     I did something a little different on the layout of the STG Gate
Delay that's now hitting the streets. rather than letting ground go
everywhere, I created a single void in the ground plane between the
input signal circuitry and the power connectors. This forces ground to
go back to the supply filter capacitors rather than surging directly
off of the cables from the power harnesses. There's still 0.35"
minimum of copper where the power filters are, so potential
differences in ground are kept at a minimum.

I'd modify this to: If you have a very clear view of what you're
doing, use your planes as you see fit. If you don't, pour a single
ground plane and use power buss traces.

-Joe