[sdiy] Updated Schematics of Rene/Wasp Hybrid

[Aaron Lanterman]

Harry, thanks so much for your feedback!

On Fri, 28 Apr 2006, harry bissell wrote:

> IMHO... no I think you need some input resistor if you are going to use
> feedback like the 10K / diodes.  Also the TL074 non-inverting input,
> after the 47uF... needs a resistor to somewhere (probably ground or a
> 1/2 V+ bias point. It cannot get input bias current. If this is working
> at all.. that 47uF MUST be leaky.

Ah! That makes sense. When I saw it the other day they were confused about
why they weren't getting any variation as the turned the resonance pot -
maybe they essentially have just a one-pole filter going.

> will ever blow up? You can 'throw' it in and it will not explode because
> it will never get enough current to do so... you are correct. you may
> not guarantee the polarity as shown.  I'd use a NP electrolytic in this
> type of case. And into the non-inverting input of the TL074 (wrong, as
> above) the input impedance will be VERY high at that point. Suppose you
> use a 1M bias resistor to satisfy the input bias current requirements...
> that is an RC of 47uF and 1M ... a very low frequency indeed.

> Probably a much smaller cap would suffice... and be easier to get in a
> NP lytic or even film ???

Interesting. I know they Kai Chi and Sean a 47 uF polarized since that's
what it looks like in Rene's schematic (one side is white and the other
black); can we guarantee correct polarity in Rene's schematic? How?

>> There's a 10 mufarad cap that looks polarized due to the "+." One side 
of
>> the cap is at virtual ground. The other - well, how it looks like the
>> voltage on the other side swings both ways - how come this doesn't blow
>> up?

> where is it ??? or is the value different ???

http://rubidium.dyndns.org/~magnus/synths/companies/buchla/Buchla_2590_3_200.jpg


If you're looking at it in proper landscape, you'll see the 10 mufd as
part of the final filter/clipper; the + makes me think it must be
polarized. But it looks to me like the voltage at the + side could swing
either way.

> I don't know what they mean by 'frequency clamping' ... does that mean
> that the filter does not tune and stays at 16KHz cutoff...

I'm not sure - Kai Chi, Sean, could you give more details.

> I don't see the 'sallen key' archetecture clearly here...R5 and R10 make
> these stages look more like single pole OTA stages... with unusual
> feedback.

Usually R5 would go back to the - input of U1, but since the inverter
inverts, we need to put it into the + terminal, right? (That's what I told
them to do, but maybe I'm missing something. Let me look at R10... let's
see... what comes out of buffer of A1 in Rene's schematic winds ups
inverted, so if it goes into the + pin of O2 on Rene's schematic, I
thought it should go into the - pin of U2 on the students' schematic to
cancel the inverstion... similarly... the feedback from buffer A2 in
Rene's schematic goes to the - terminal of the 3080, but, since the
inverter buffer in the student schematic inverts, I had them take it to
the + terminal.

I'm probably confused though. Help us Jedi Master Harry!

> If I have some time I'll try and simulate this circuit.  Are your
> students using any simulation programs ???  If so they can make an OTA
> model from discrete transistors by copying the 3080 schematic... but use
> DIODE connected transistors (b-e junction) that match the other
> transistors. do NOT use the 'diode' model

I don't think they are on this one. Not all the students in the class have
seen SPICE in their courses yet, and mastering SPICE takes some time, so I
didn't want to make using it a requirement. Many of the students who are
comfortable with it are using SPICE.

That's a good piece of advice on the OTA model - some of my students were
complaining about not having a model for the OTA chips.

> A pair of N-mos and P-mos transistors will make a 4069 model (do not use 
> a digital model !)... add maybe 100 ohms in series with the input to 
> simualte the input protection circuit, and 15pF to the negative supply 
> to simulate 4000 series gate capacitance.
>
> See if the model matches what you are seeing.

- Aaron