[sdiy] Staircase Generator: 4 bits but 8 steps?

[xamboldt]

Hi Tim (and everyone),

I added .1uf bypass caps to the '93 and the 555, but unfortunately nothing
changed. So, like Tim R suggested too me off-list, I replaced the original
clock conditioning circuit with a PNP/NPN schmitt trigger, and, voila! -
I've got 16 steps. Thanks, Tim!

Of course in the process of performing all this surgery, something screwy
happened to that onboard 555 clock I was using, so I'll have to figure out
what went wrong there before I can put this in the rack and hope that time
will dull the pain I experienced birthing this beast.

I've sort of come to the conclusion, based on the difficulties I had and
some of the issues raised by other list members, that using TTL for this
kind of circuit isn't the best solution. It's built now, and is working, so
I'll let it live, but if anyone else wants to try something like this, I'd
suggest a CMOS 4-bit counter, which theoretically would be less of a pain to
use...

Thanks again to Tim and everyone who chimed in... I hope I can help down the
line sometime...

-Chris

> 
> --- xamboldt <xamboldt at earthlink.net> wrote:
> 
>> Hi Tim,
>> 
>> Thanks for the suggestions - very helpful. It's
>> hooked up like this:
>> 
>> http://www.ele4music.com/pdfs/lfo5a.pdf
>> 
>> The only difference is I'm powering it from a
>> regulated 5V supply, not the
>> zener. And I've got a diode parallel to the 2k2
>> resistor in the
>> differentiator that clocks pin 14 (cathode to pin
>> 14).
>> 
>> Pin 1 is clocked from pin 12 (LSB) like they say to
>> do in the '93 datasheet
>> (your suggestion of of clocking from pin 14 and
>> connecting 11 to 14 should
>> work, too).
>> 
>> No bypass cap, yet...
>> 
>> I hooked up some LEDs like you said, and there is
>> something screwy
>> happening. Pin 12 (bit 0) is always on. Well, not
>> quite always. I have it
>> normally clocked from a 555 that's also clocking a
>> sequencer. When that is
>> clocking it, bit 0 is always on.
>> 
>> I then clocked it from the pulse out of an MOTM 300
>> VCO (about 50% duty
>> cycle), and when the VCO was reallllly slow, for
>> maybe 1/2 of a clock pulse
>> at the beginning of the staircase, bit 0 would be
>> off, then it would come on
>> and stay on for the rest of the sequence. At higher
>> clocking rates, bit 0
>> would always stay on.
>> 
>> All the other bits appear to be working properly,
>> except they're acting as a
>> 3-bit counter, since bit 0 is staying on.
>> 
>> Seems like it is a clocking issue. Maybe try a
>> different differentiator on
>> the front end? Any ideas?
>> 
>> -Chris
>> 
>> 
>> On 9/6/05 5:44 PM, "Tim Ressel"
>> <madhun2001 at yahoo.com> wrote:
>> 
>>> Hey Chris,
>>> 
>>> Um, are you getting 0V at some point as well?  A
>> quick
>>> sanity check would be to put LEDs on the outputs
>> of
>>> the LS93 and clock it slow enough to see the
>> count.
>>> 
>>> How is the '93 hooked up? Are you clocking pin 14?
>> If
>>> you are clocking pin 1, pin 11 should go to pin
>> 14. If
>>> you tied pin 8 to pin 14, you would get funky
>> output.
>>> 
>>> What you clocking with? A messy clock could mess
>>> things up. Also it doesn't hurt to put a bypass
>> cap
>>> across that counter.
>>> 
>>> --TimR
>>> 
>>> 
>>> --- xamboldt <xamboldt at earthlink.net> wrote:
>>> 
>>>> I sent this message yesterday, but so far it
>> hasn't
>>>> shown up on the list -
>>>> apologies if you get it twice...
>>>> 
>>>> 
>>>> Hi Everyone,
>>>> 
>>>> I breadboarded an EFM staircase generator. It
>> uses a
>>>> 74LS93 to generate the
>>>> 4 binary digits, but I'm only hearing 8 steps on
>> the
>>>> staircase. It's a 4-bit
>>>> device, and 4 bits is 16 steps, right? Shouldn't
>>>> there be 16 steps on the
>>>> staircase? From what I understand, the D/A
>> section
>>>> is pretty standard - see
>>>> the asciimatic below:
>>>> 
>>>> 
>>>>          20K
>>>> Bit 3 /\/\/\/\------------to opamp buffer
>>>>               /
>>>>               \10K
>>>>               /
>>>>          20K  \
>>>> Bit 2 /\/\/\/\-
>>>>               /
>>>>               \10K
>>>>               /
>>>>          20K  \
>>>> Bit 1 /\/\/\/\-
>>>>               /
>>>>               \10K
>>>>               /
>>>>          20K  \
>>>> Bit 0 /\/\/\/\-
>>>>               /
>>>>               \20K
>>>>               /
>>>>               \
>>>>               |
>>>>              GND
>>>> 
>>>> 
>>>> At first I thought maybe that Bit 3 wasn't
>> getting
>>>> through, but according to
>>>> my continuity tester, it's hooked up. Yes, pins
>> 12
>>>> and 1 are connected to
>>>> utilize the 74LS93 as a full 4-bit counter.
>>>> 
>>>> Should there only be 8 steps on the staircase
>> even
>>>> though it's a 4-bit
>>>> counter? Or is something not right?
>>>> 
>>>> BTW, I'm getting the following voltages from the
>>>> output:
>>>> .2943
>>>> .622
>>>> .935
>>>> 1.306
>>>> 1.594
>>>> 1.980
>>>> 2.351
>>>> 2.811
>>>> 
>>>> Thanks,
>>>> Chris
>>>> 
>>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>> 
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> 
> 
> 
> 
> 
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