[sdiy] Staircase Generator: 4 bits but 8 steps?

xamboldt xamboldt at earthlink.net
Tue Sep 6 22:22:33 CEST 2005


I sent this message yesterday, but so far it hasn't shown up on the list -
apologies if you get it twice...


Hi Everyone,

I breadboarded an EFM staircase generator. It uses a 74LS93 to generate the
4 binary digits, but I'm only hearing 8 steps on the staircase. It's a 4-bit
device, and 4 bits is 16 steps, right? Shouldn't there be 16 steps on the
staircase? From what I understand, the D/A section is pretty standard - see
the asciimatic below:


         20K
Bit 3 /\/\/\/\------------to opamp buffer
              /
              \10K
              /
         20K  \
Bit 2 /\/\/\/\-
              /
              \10K
              /
         20K  \
Bit 1 /\/\/\/\-
              /
              \10K
              /
         20K  \
Bit 0 /\/\/\/\-
              /
              \20K
              /
              \
              |
             GND


At first I thought maybe that Bit 3 wasn't getting through, but according to
my continuity tester, it's hooked up. Yes, pins 12 and 1 are connected to
utilize the 74LS93 as a full 4-bit counter.

Should there only be 8 steps on the staircase even though it's a 4-bit
counter? Or is something not right?

BTW, I'm getting the following voltages from the output:
.2943
.622
.935
1.306
1.594
1.980
2.351
2.811

Thanks,
Chris




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