[sdiy] CMOS for linear circuits.
ryan williams
destrukto at cox.net
Fri Nov 4 04:46:22 CET 2005
hi all,
since I'm currently building some cmos filters, vcos, and theremin
control circuits I have been wondering about using multiple gates on the
same part.
the glasgow theremin
http://home.att.net/~theremin1/Glasgow/glasgow.html
uses all CMOS to generate a control voltage from hand-antenna distance
(just like any other theremin, but with tachometer). They have used a
different IC for each gate that sees a frequency that is different from
the others. There is 10 ICs total just to make up the antenna->CV
sections. there are enough available gates to do this with only 5 ICs.
Whats the deal with this. I expect there might be some coupling between
gates on the same chip? I have not experienced something like this but
only read people mentioning that kind of problem. So when is it ok to
put them on the same chip, and when should they be seperate? maybe it's
a complicated question. if so, what books to read?
-ryan
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