[sdiy] Wishing for Interdesign.....wish granted?

[ASSI]

On Samstag, 28. Mai 2005 16:52, John Loffink wrote:
> So, given that the 700 library contains a transconductance amplifier,
> how does this device compare in specs to a CA3080 or CA3280?

Bandwidth-wise it should about equal the CA3280, but it would need to 
be modified as there is no Iabc input yet and the PNP current mirrors 
aren't wide enough. The low current for the pnp is tha Achilles' heel of 
the 700 series array. You'd need to gang about 20 of these blocks to 
get to CA3280 current/matching levels (unfortunately the large PNP 
don't match as well), on the plus side this improves matching - but 
perhaps not to the levels that the interdigitated transistors in the 
CA3280 provide. So a 724 array makes a dual OTA (DIL-14) and the 747 
array should give a quad OTA (DIL-24 w/ offset trim input), but you 
waste quite a bit of the available resources. Using a 
pnp/npn-Darlington mirror sacrifices voltage headroom and speed for 
output current, but then a 713 array already yields a triple OTA plus 
some expo converters.

When I talked to Zetex some time ago, I asked about their Kit parts. 
They said they would not sell them, but they were nice enough to send 
me a handful (which I haven't used yet because you can not get a big 
enough circuit to make it worth your while). So, I breadboarded the OTA 
shown in the datasheet with a 1:1 tail current mirror and took it to 
the lab today (that's the first time in years I've used all four SMU 
and two VSU at once). Between 5V and 16V of supply I got reasonable OTA 
action. Input offset was around 6mV to 10mV depending on supply and 
biasing conditions and could be trimmed out over Iabc, but there was an 
additional output current offset of around 1uA that was wandering a bit 
with the biasing. There was a problem with the tail current input, 
either with the biasing itself or some leakage that I had no time to 
sort out today. So for now, no real Iabc linearity test, but in the 
range it was working it looked reasonable. Reaction to temperature 
(finger touch) as expected, unfortunaltely it will not fit on the 
thermostream chuck... No common mode reange tests either for today, but 
the positive side was saturating a bit earlier than the negative 
(that's to be expected as the pnp are so weak compared to the npn).

> ASIC technique BPID presumably being the 700 series, costs of US$2.19
> to US$4.19 per part in quantities of 6K to 40K. There are also NRE
> charges, but I assume one would buy the SIMetrix and ICED tools,
> which is an investment in the $5-$12K range.

You don't really need to buy these tools, minimally something that 
produces a GDS2 file for the mask-making process is sufficient. The 
masks themselves would run about $10k. I have not been able to 
determine what Zetex would charge for a one-off run, including 
packaging but without functional test. Depending on lot size and yield 
you'd get anywhere from 4000 to 12000 IC. Cost per IC would most likely 
run somewhere between $5 and $15, so it better had a few more functions 
than just the OTA.

Searching the web I have found three fabs that seem to do single batch 
runs of some suitable bipolar process (two in the Valley and one in 
Germany), but they'd certainly have much higher NRE cost as they require 
a full mask set. Undoubtedly there are more outfits in asia, at 
universities and other institutions that don't advertise themselves as 
foundries.


Achim.
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