[sdiy] Popcorn Noise Generator?

[Magnus Danielson]

From: Glen <mclilith at charter.net>
Subject: Re: [sdiy] Popcorn Noise Generator?
Date: Sun, 10 Jul 2005 16:54:06 -0400
Message-ID: <4.3.2.7.2.20050710164427.04b01d80 at mail.charter.net>

Glen,

> What about this idea:
> 
> Let's say I create a program which creates WAV files out of pulses which 
> are 1 sample in duration, of random amplitude, and random polarity.
> 
> Step 1)
> Let's say the program places a positive pulse at the 1st sample location, 
> with a random amplitude.
> 
> Step 2)
> Then, it calculates a random time offset from that location, another random 
> amplitude, and picks a random polarity. At this new location, it inserts 
> this new pulse. Step 2 is repeated, until the WAV file is long enough to 
> satisfy our needs.
> 
> Would _that_ be a decent simulation of popcorn noise? I could probably code 
> something like that fairly easily.
> 
> Question:
> Does the pulse width need to be random as well, or is random amplitude enough?

Well, you could fiddle around with something like that and see what it gives.

I would do the following instead:

First create a long PRBS generator, operating at a multiple of the final
sampling rate. It is a simple matter of shift-register and XORing with the
polynom if the top bit is 1. This generates white noise.

Then, integrating the scaled output of the PRBS. This is done by adding or
subtracting the scale amplitude due to a 1 or 0 output of the PRBS respectively
to the previous integrator output sample.

Now we have our popcorn noise, but in a too high sampling frequency, so we
perform a down-sampling by FIR filtering and using every other sample in a few
rounds.

Maybe the precaution of running oversampled is overdoing it, but then the same
scheme would be used at target samplerate and no downsampling performed.

I am sure someone could fit this into a small PIC or AVR. Doing it in a FPGA
or CPLD is also trivial, but you could skip the downsampling. ;O)
In all these cases, you could skip the digital integration and do it in
analogue using a resistor, a capacitor and an op-amp in the traditional
integrator setup.

Actually, skipping the FPGA/CPLD or MCU and use a standard analogue white noise
source would also be possible, the integrator would only be the last
amplification step.

Cheers,
Magnus