[sdiy] SRAM access

[James Patchell]

On the 6264 and 62256, the OE line is active low, so you need to tie this 
pin low to read the data.  And yes, you can leave the pin low and just 
toggle the address bits to read a new address location.  While the address 
bits are changing, the data will be indeterminate.  You also need to make 
sure the CS line (also active low) is also low and that the WE line (active 
low again) is high.  These ram chips are totally asynchronous.

At 09:23 PM 1/11/2005 +0000, Chris CROSSKEY wrote:
>I thought you had to cycle the OE after changing the address bits....mebbe 
>I'm wrong... don't some have OE/WR-bar (or vice versa) plus clock?.... am 
>I geting confused here?
>
>chrisc
>----- Original Message ----- From: "Antti Huovilainen" <ajhuovil at cc.hut.fi>
>To: <synth-diy at dropmix.xs4all.nl>
>Sent: Tuesday, January 11, 2005 5:34 PM
>Subject: [sdiy] SRAM access
>
>
>>Hi
>>
>>Is it possible to tie output enable (OE) high and still use common SRAM 
>>chips just by changing address bits?
>>
>>I have checked datasheets for 6264 and 62256 but they don't say anything 
>>about that and timing diagrams assume normal cpu-like access with OE 
>>strobed after address has been latched.
>>
>>Antti
>>
>>Give a man a fire, and he'll be warm that day,
>>Set him alight and he'll be warm for the rest of his life
>

         -Jim
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