[sdiy] SRAM access

[Thorsten Klose]

Hi Antti,

> Is it possible to tie output enable (OE) high and still use common SRAM 
> chips just by changing address bits?

if you only want to read from SRAM this will work in principle,
but OE# has to be tied to 0 (it's a low-active signal).
This info is well encrypted in the block and timing diagrams 
(the address won't be latched)

But keep in mind that only reading from SRAM doesn't really
make sense, sooner or later (at least after power-on) you 
want to write something into the memory.

Possibly you want to save one IO pin on your micro, this 
can be made by using an inverter between OE# and WE#. In
this case you have to ensure that the write data is not
driven by the uC before the output drivers of the SRAM
are completely deactivated. The appr. timing parameter
is mentioned in the Hitachi HM62256 datasheet as "tOHZ" 
(ca. 30...50 nS)

Best Regards, Thorsten.