[sdiy] EMS VCS3 VCO

[Magnus Danielson]

From: Grant Richter <grichter at asapnet.net>
Subject: Re: [sdiy] EMS VCS3 VCO
Date: Sun, 02 Jan 2005 22:47:12 -0600
Message-ID: <BDFE2A70.3CAB%grichter at asapnet.net>

> > Q59 & Q60 - CV input op-amp with Q61 & Q63 for expo-responce.
> > 
> > The current charges the capacitor and Q64 & Q65 buffers and amplifies the
> > signal. Q67 & Q68 forms the schmittrigger amplifier and Q62 is the feedback
> > transistor.
> 
> You can not run a current source (like expo transistor collector) directly
> into a capacitor. Start up transient is infinite and stalls simulation. Put
> a resistor of some milliohms between transistor collector and cap.
> 
> PC Traces, solder joints and component leads are milliohm resistors (with
> some inductance and parasitic capacitance too) between EVERY component in
> EVERY circuit in the real world. If you really simulated something, every
> wire, trace and interconnect would have to be a component model.
> 
> The map is not the territory.

Indeed. Good observation!

It suffice to have a little series resistance in the capacitor itself. I 
beleive it's part of the spice model. It's been too long since I dug into spice
stuff myself, so it's not fully up-to-date. Spice models are that, models, and
with it comes the need to maintain model method clean-ness. For instance must
all nodes have DC-traceability, so for some nodes you may need to add a high-
ohm resistor to ground or something, so that the DC level can be found before
any other analysis. That has to do with simulation convergence and not the real
world, where these things solve themselfs anyway, and besides, the stray
conductance to the surrounding is in place anyway. Even a lumped parameter
model of the world is a simplification, but many times it will be accurate
enought model for lower frequency stuff.

Cheers,
Magnus