[sdiy] New DIY synth has born

[Rainer Buchty]

>That issue being, reading back from the SID. I'm doing this from memory and 
>I really should be sleeping right now but I can't help the need to run this 
>up the flat pole as it were. So bear with me here. If memory serves, you 
>can only read back from the SID if it's synced to the 1-meg clock?

The whole SID timing is inherently based on the input clock, so also 
oscillator and ADSR timing as well as PotX update is based upon this 
clock which, typically, is the 1MHz Phi2 clock but can be as slow as 
50kHz (20us).

According to the 6581 datasheet [1] 1us is pretty much the minimal cycle
time for a 6581, it possibly can be safely tweaked to 1.11MHz given the
fact that the high-time of Phi2 has to be at least 450ns. (At least
1.0225MHz is no problem as this is the clock speed used in the NTSC
C64.)

IIRC not even Commodore clocked the 6581 higher, so e.g. the C128 which 
offered a 2MHz mode fell back to 1MHz when writing to the I/O space.

>If one wished to use OSC 3 as an LFO for filter sweeps, one would have
>to be able to read back the value and then feed that back into the
>filter control register.

Read/Write timing is explained on page 9 of the SID datasheet. I don't 
see a reason why reading/writing shouldn't be possible with e.g. an AVR, 
though it might require either a dedicated "SID bus" or some FIFO-based 
interface where the AVR just posts its commands to the SID with native 
speed (e.g. 16MHz), the SID will then be addressed by the FIFO and 
similarly post answers into another FIFO, both in the 1MHz area.

>I'm pretty sure it was something to do with the sound architecture being 
>synchronized/triggered by a note-on event every time.

The ADSR is triggered by a Gate pulse, the rest of the architecture
should be pretty much free running; but it's been quite some time that
I've been into SID programming. By constantly flicking the gate bit and
with settings of A=D=R=0 you should be able to apply a
software-controlled EG to the individual DCAs.

If you want to force oscillators to reset, there's a TEST bit for that 
which sometimes is also needed to re-start the oscillators after 
freezing it using "inappropriate" waveform settings. Flicking that bit 
could also be used to manually hard-sync an oscillator to external 
events.

Changing waveforms IIRC only became effective with also changing the
gate bit, but maybe Thorsten can elaborate a bit more on this as he's
implemented waveform sequencing.

>Thus preventing anything from being independently free-running.

Oh, it is free running -- apart from the envelope, which needs to be 
triggered as any other envelope. It's not that you have to manually 
clock the phase accumulator.

If you want to get an idea about what's ticking inside the SID, there's 
a nice interview with Bob Yannes (who designed the it)[2]; and for those 
interested in building a SID-soundalike filter, the schematic on which 
the ReSID (the probably most accurate SID emulation) filter engine is 
based can be found in some .h file within the ReSID sources[3].

Rainer

[1] http://www.funet.fi/pub/cbm/documents/chipdata/6581.zip
[2] http://stud4.tuwien.ac.at/~e9426444/yannes.html
[3] ftp://ftp.funet.fi/pub/cbm/crossplatform/emulators/resid/resid-0.16.tar.gz
    or (included in VICE emulator) http://viceteam.bei.t-online.de/