[sdiy] integrator / capacitor leakage

[René Schmitz]

Hi Jürgen and all,

JH. wrote:
> I could live with a master clock input, which will then determine the 
> frequency of the sin and cos outputs. I could just use a PLL to
> step up from an ordinary VCO signal. Maybe.

Thats probably more trouble than its worth.

But the PLL "keyword" triggered something in my mind:

You can use a type 1 (XOR, multiplyer) phase comparator and two
identical OSCs to make a quadrature signal.
I saw that in a philips app note a while ago.
(http://www.semiconductors.philips.com/acrobat/applicationnotes/AN1981.pdf)

One could do this with two VCOs. The VCOs are arranged in a tracking
arrangement and the phase comparator would keep both 90degrees
apart. How frequency agile this would be is another matter, but one
doesn't have to build much (if anything, you should have a ringmod and
two VCOs...) to find out.

Cheers,
  René

-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159