[sdiy] Failure modes on bypass caps...

[Harry Bissell Jr]

In most cases I don't think the system would resonate well... the caps
  are the same values but the inductances would be all over the map...
  
  unless it was a memory or logic type board where the ICs were in a very uniform pattern.
  
  I do agree there should be a couple of larger caps, just to fight the  inductance of the power supply wiring, if the supply is off the  board.  If it is onbaord, you
  probably have larger caps already.
  
  H^) harry

Seb Francis <seb at burnit.co.uk> wrote:  Aaron Lanterman wrote:

>
>> But in general, ceramics "do not fail", so there isn't a whole lot to 
>> worry about with them.
>
>
> So it sounds like the take home message is to always use ceramics for 
> your bypassing pleasure?
>

Bad idea .. ceramic caps have very low ESR (a good thing for 
decoupling!) but if you have a load of them all over a PCB, the combined 
effect of their capacitance and inductance of the PCB tracks in between 
will create a resonant network that will tend to 'ring' at a particular 
frequency.

This is overcome by putting a cap with a higher ESR ('equivalent series 
resistance) in parrallel somewhere on the board.  A tantalum or 
electrolytic is suitable.

A general rule of thumb is:

Lots of 100nF ceramic placed as near as possible to where they are 
needed (e.g. by ICs)
A single 20uF electrolytic or 10uF tantalum per power bus where the 
power comes into the module.  For very big boards, larger electrolytic 
or tantalum should be used (perhaps 20uF electrolytic per 10 100nF 
ceramic caps, or 10uF tantalum per 20 100nF ceramics)

Seb



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