[sdiy] integrator / capacitor leakage

[Magnus Danielson]

From: James Patchell <patchell at cox.net>
Subject: Re: [sdiy] integrator / capacitor leakage
Date: Sat, 03 Dec 2005 10:34:47 -0800
Message-ID: <5.2.1.1.2.20051203102538.022e8c88 at pop.west.cox.net>

Hi James,

> I think this problem is being approached from the wrong direction....

I think the question was asked on a little too specific question. However, this
may be motiviated to learn what errors may be creeping up in that part of the
world. When attempting a design giving a continous span of 6 decades of
anything (frequency in this case), you have to look around for possible flaws
and understand them.

> Generally, I start out with a set of requirements (a spec), and then find 
> out what it will take to meet those requirements.  It doesn't matter how 
> you get there as long as you meet those requirements.  Sometimes you are 
> surprised at what you can get away with.  The best capacitor in the world 
> may cost you big bucks, but if you can meet those requirements with a 25 
> cent capacitor, so much the better.  Sometimes we obsess on making 
> something really good, when there are better less expensive solutions...

Sometimes it just take carefull use of standard technology, sometimes you can
compensate the worst aspects out of it. If you are willing to trim, that will
help.

But, what is the *real* spec? OK, 30 mHz to 20 kHz is the only spec I've seen
so far, but what is the tracking error allowed, and for what temperature-range
and for what trimming cycle-time?

> I suspect you are going to have to try several approaches before you find 
> the one that will meet your requirements.

Me too.

Cheers,
Magnus