[sdiy] integrator / capacitor leakage

[Magnus Danielson]

From: Grant Richter <grichter at asapnet.net>
Subject: Re: [sdiy] integrator / capacitor leakage
Date: Sat, 3 Dec 2005 10:37:34 -0600
Message-ID: <7C2FF4A4-6FF9-4DAD-B90A-938D1C7624FC at asapnet.net>

Hi Grant,

> I think the answer is so obvious, it is hard to see.
> Any multiplication (amplification) of the integrator output will  
> multiply the errors by the same factor.
> 
> So, commutative axiom says:
> 
> (Signal + Error) * 10 = (10 * Signal) + (10 * Error)

No. You are assuming that the Error is fully linear with the Signal strength.
It isn't. Even if you model the capacitor leakage to be linear, this only
holds for errors internal to the capacitors, but reality has given use more
sorces of errors than that, so to combat those errors additional signal
strength can be a tool to get better distance, but it also has its drawbacks.

I think my earlier posting gives some more details to what I am considering.

Cheers,
Magnus