[sdiy] SRAM Memory Upgrade (Old Sampler) ???

[Plutoniq9]

Thanks 4 the advice guy's! I actually managed to find a decent priced 512k x 
8-bit NVSRAM from Texas Instruments that should do the trick. Can you 
believe I saw one 4M 32-pin SRAM priced at $200???? Whoa!

I'll check out the encoder, sounds perfect for the application!

Seeya

Ryan


>From: harrybissell <harrybissell at prodigy.net>
>To: "::Phuture::" <phuturesque at hotmail.com>
>CC: synth-diy at dropmix.xs4all.nl
>Subject: Re: [sdiy] SRAM Memory Upgrade (Old Sampler) ???
>Date: Sat, 27 Aug 2005 21:42:38 -0400
>
>Hello Phuture
>
>Yes... it would in theory work. As long as you did not change address lines
>during a write cycle.  The best way would be to use some latch for the 
>extra
>lines that is disabled during a write (or read).
>
>Grayhill makes a $5 class rotary encoder that has hex output. DigiKey
>has it. That could do all your addressing for you, just turn one knob
>
>H^) harry
>
>::Phuture:: wrote:
>
> > Hi people,
> >
> > Wow, it's been maybe 4yrs since i last was on this list!
> >
> > So, I've got a question that relates to upgrading memory in a certain 
>breed
> > of old casio samplers.
> > I'm sure it's impossible to increase the actual sampling time, but I 
>feel
> > I'd certainly be able to increase the ammount of banks.
> >
> > Right now, the sampler uses a single 32k x 8-bit 28-pin DIP CMOS SRAM. 
>This,
> > i believe, was the largest possible size in a 28-pin format. Now, 
>hopefully,
> > I'd like to install a 32-pin SRAM in it's place, which is organized as 
>512k
> > x 8-bit (16 times the original size). Aside from the top 2-pins on both
> > sides of the 32-pin IC, the rest of the pins line up with the original
> > 28-pin SRAM.
> >
> > The difference between the two chips, besides the VCC being on a 
>different
> > pin, is that there is an additional (4) address lines....... All other 
>pins
> > are compatible with the 28-pin version.
> >
> > Now, I'm no expert on how memory works.....but from my research it seems
> > like adding 4 spdt switches to control the highest 4 address lines would
> > give me (binary) access to switch between the 16 banks. Is this correct?
> >
> > Aside from the additional banks, the newer SRAM would give data 
>retention of
> > 10+ years because of an inbuilt lithium battery in the IC.
> >
> > I'm a little techie, but still need some advise from a pro that can 
>verify
> > that this would indeed work, at least theoretically!
> >
> > Thanks
> >
> > Ryan (Plutonique9)
> >
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