[sdiy] Upper frequency limit for VCO

[Ian Fritz]

At 12:31 PM 8/2/05, Peter Grenader wrote:

>But it brings up an interesting hack.  Not that it would need to be done
>that way - but I'm postulating on what exactly would happen if you divided
>the reset pulse as it led back to the core?  This is interesting.  It would
>in effect, stall the oscillation.  OK, so...what would happen to the core's
>waveshape fidelity when it came back alive so to speak then the divided
>(delayed) reset pulse finally did it's thing in the flyback?

Um ... unless I misunderstand what you are asking, the ramp will keep 
ramping until the next reset pulse is fed back, or until the integrator 
hits the supply rail, whichever happens first.

   Ian