[sdiy] Upper frequency limit for VCO

[Peter Grenader]

Hmmm...my integrator yields a triangle, but the same applies.  You'll need
to put the integrator output through a comparator, or to save duplication,
just tap off the reset comparator that's already there.

But it brings up an interesting hack.  Not that it would need to be done
that way - but I'm postulating on what exactly would happen if you divided
the reset pulse as it led back to the core?  This is interesting.  It would
in effect, stall the oscillation.  OK, so...what would happen to the core's
waveshape fidelity when it came back alive so to speak then the divided
(delayed) reset pulse finally did it's thing in the flyback?

hmm...

Anyway, for the purpose of tapping a divided output of any core, all you
need to do is in fact divide the reset pulse, but don't fed that divide
output back into the core, just take it to the output waveshapers instead.
You'll have a bit of extra work creating some of the standard waveshapes,
from a square wave, but it's do-able.

- P