[sdiy] Upper frequency limit for VCO

[Peter Grenader]

Mine is an integrator type and (in my limited experience of integrator VCOs,
ergo - the Model 15), there are many  variables involved which determine
it's frequency range as the control limits from the expo converter, feed
into the reset comparator and inherent current in the core (taking the
fluctuations from the expo out of the equation for a second) are equal
cuplrits.

Some specific contributors  are:  the voltage divider going into the expo
converter, the speed of the circuit or IC creating the reset pulse, the
current limiter after the integrator leading to the reset comparator, of
course the cap value in the integrator itself - obviously the pot value used
for freq control and the summing resistors in the VC adder, the resistors
feeding the current imirror in the core, these are but a few.

In any event, the Model 15 is set for anywhere from 3 to 5 Hz to 25K.  By
screwing around however, I've got that up to 50 plus K or so, and there's
little doubt it could go much much higher.

Higher freq may not be the problem - it's the range that you may find you're
needing to tweek around more, especially when maintaining 1v/oct response in
a divide-down scheme.  I may be full of cr at p on this, but it seems to me
you'll be dialing that in more that than it's high limit.

hope this helps,

- P



 Brain Dekork wrote:

Does anyone know what the upper frequency limit for the
integrator-with-reset VCO is?  I want to divide it down to mix footages.
 
Thanks,
Brian
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