[sdiy] Transistor help

harrybissell harrybissell at prodigy.net
Thu Apr 28 03:08:00 CEST 2005


Puzzled by a set of initials on an early ARP VCO schematic that read "RAP"
I asked Bob Pease about it... it was a *different* RAP but he
kindly agreed to advise on the questions I had. Text follows...   H^) harry

I never saw this  sawtooth oscillator before - but I recognize how ARP
did things!

> The questions involve the expo converter design...

>> 1) what are the advantages / disadvantages of the NPN / PNP
> type converter vs. the dual NPN / opamp servo design ???

**** I am sure  the answer is: The NPN/PNP  logger is -  GOOD ENOUGH!!

*** The servo version is BETTER - slightly more precise -but it's more
complicated, and is bulkier, and costs  more --  so there's no need to do
that, if the other one is GOOD ENOUGH!

> 2) What parameters are selected for in the NPN / PNP
> transistors....

*** (A)  fairly high beta, 150 min;   and
 *** (B)  close Vbe match, within 1 or 2 mV, Max.

> 3) How are the NPN / PNP transistors matched ?

*** Easy:  Get  an NPN transistor whose Vbe is "typical"  for the middle of the
distributions of the NPNs  and PNPs  that will be used.   Tie its base to
ground, and run a suitable current in its emitter.  Perhaps  200 UA?   Compare
this Vbe  to the Vbe of an NPN, - the DUT, plugged into a nice socket -  running
at the same current, and read the  DELTA Vbe  (Ve1 - Ve2) on a  decent  DVM. Bin
the NPNs  into bins 1 mv  wide.  Do this  while a lot of air is moving  over
them both, good room temp air from a blower,  stirred in a big cardboard box.
Don't let them get heated much by fingers.

I will soon send  directions  on how to find a couple  columns I have
written on this. See at the end at &&&&&

Grade out a whole bunch of NPNs  to see the Vbe graded into bins 1 mv
wide.  Then cover up all the NPN  bins with clear plastic.

Now  buffer the  emitter of the NPN  with a GOOD ( sub 20 UV) op-amp.
Tie  the base of a PNP there, using a nice socket.  Run the PNP with the same
current  in its emitter , as the NPN.  Grade the delta  Vbe of the PNP, also
into bins 1 mV  wide.  I.E. read its Ve  compared to ground. Make sure that a
BIGGER Vbe  gets put in a bin adjacent  to the NPN that has a BIGGER  Vbe.   Set
these bins  next to the covered-up NPN bins.  Of course, moving air past the NPN
and PNP.

Grade out enough PNP's so the  number of transistors is as needed.

Grab one NPN  from the SAME  size bin as the PNP's - big, or small, same number
of millivolts. The matching will be very good.

Got the picture?  Additionally, you can take matched pairs of NPNs  from the
same  bin  of NPN's;  and matched pairs  of PNPs  from the PNP bins. This is how
ARP and I and Bob Malter did it, 40 years ago.

NOTE:  The  resistor  marked "3%"  - was it  3.87k? -  tied to the base of the
transistor in that bloc - the PNP, I recall - was  a Fenicoloy resistor at +
3400 ppm per  degrees C, and it was there to provide temperature compensation,
for the GAIN of that bloc.   Don't  forget that !

*** Best regards. /rap

> sorry to bother you with these questions... but even our 'old
> timers' don't go back far enough to answer them. You didn't
> expect (as an engineer) that you would ever be free from supporting
> your old (VERY old) designs  ;^P

*** Like  I said  - I can  even support ARP's old designs!!/ rap

> Thanks for any assistance you can offer...

&&&&&&&&&&&&&&&&&&&&&&&&
Subject:    Vbe matching

  From: Robert A Pease x5613 <rap at galaxy.nsc.com>

Go to:

http://www.national.com/rap/Story/transistors.html

and also: go to:   http://www.elecdesign.com/Index.cfm?Action=Pease

and  go back to Aug. 22, 1991.  to see:

http://www.elecdesign.com/Articles/Index.cfm?ArticleID=731

for more details  on matching transistors with  moving air.




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