[sdiy] resistors and 4066 gates (and 16 bit...)
Harry Bissell Jr
harrybissell at prodigy.net
Mon Apr 25 23:00:52 CEST 2005
--- "Roy J. Tellason" <rtellason at blazenet.net> wrote:
> > Your idea will not work directly. The steps need
> to be 1/2 of the next step,
> > or they will fail to line up. what works at one
> end of the range will cause
> > holes in the other.
>
> I'm not sure I understand how you mean this. If I
> take an op amp with some
> resistor setting the gain (say with unity gain as
> maximum) and the input
> impedance is a known value, then what's the problem
> with connecting various
> other resistors to give a log response?
Thunk of the point where you do the transition from
1/2 scale to the next step. (from 10000000 to
10000001)
The major step will be OK, because you sized the
resistor correctly. But the LSB will be wrong... you
chose the value at the low end of the scale and its a
very small step. After this change it should be a
much BIGGER step. No matter which way you slice it,
you lose.
PMI made a 'companding DAC' back in the 80's... They
used an number of "cords" which set the upper and
lower limits to a series of linear 5 bit "steps" so it
was a piecewise linear approximation to an expo
function.
> > 4066 switches could be used, but you need to make
> the resistors MUCH bigger
> > than the on resistance of the switch of you get a
> lot of error.
>
> Seems to me those things have an on resistance
> that's way lower than their
> 4016 predecessor. Something like 50 ohms?
Yes... something LIKE 50 ohms but not stable with
applied voltage for one thing... and not guaranteed to
be 50 ohms, and not matched from package to package...
Still you'd need to probably be in the 5K range
(minimum) for your resistors... so that the 50 ohms
(maybe) is a small fraction of the total, and the
voltage drop across the switch remains small.
If you wanted to, you could make resistive dividers on
the far side of the switch (to set bit weights) and
then sum them together into an opamp. Locating the
switch at the inverting input would guarantee that the
voltage would be close to zero. You'd need to set the
supplies to the 4066 to either +/-7.5 (with logic
level problems) or cheat and run the negative pin one
diode drop below ground (-.7 to +15 perhaps). This
would allow you to trim out any errors on a bit by bit
basis.
> Isn't that why they came up with the R2R ladder in
> the first place?
In this case you need to precisely source, or sink
currents into that node. The resistors are the same
size, but you still rely on being able to precisely
hold the point high, or low... without modulating the
voltage on the CMOS output from the state of other
stages... not easy.
The Sequential Circuits Model 700 programmer used this
type of DAC, with .01% hand matched resistors and
parallel'd gates where higher currents were expected.
Early ProV used this as well iirc.
H^) harry
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