[sdiy] Pcb design question

[James Patchell]

Are we talking about a micro controller with maybe a 16 to 20MHz 
clock?....in that case....I would say you are worrying too much.  You need 
to worry more about how you have the power and ground bypassed.

-Jim (why use one bypass capacitor with 3 or 4 will do the same job :-)

At 11:30 PM 10/16/2004 +0200, bschiett at etro.vub.ac.be wrote:
>Hi list,
>
>I'm working on a pcb design and I have some questions about traces..
>
>I have an SRAM connected to a microcontroller. There is an
>octal latch between the sram and the mcu, and the data traces
>go from the SRAM to the latch, and continue onto a 10-pin
>header, and then continue over the upper layer to the mcu.
>Note that the traces sort of form an inductor, with in the
>core/center a GND via/plane. I am close to finishing this PCB
>and I'm starting to worry about a lot of things. One of my
>worries is that these data traces forming a loop/inductor
>could inject a lot of noise into the GND net. Am I correct?
>Or am I worrying to much?
>
>You can have a look at a close up of the problem here:
>
>http://www-ccrma.stanford.edu/~bschiett/pcb.jpg
>
>
>Thanks,
>Bert

         -Jim
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