[sdiy] Re: Bottom Ten ICs

[Richard Wentk]

At 17:34 07/10/2004 +0200, Rainer Buchty wrote:
> >It was architecturally stupid because if you're going to make no
> >distinction between RAM and registers you might as well design the
> >architecture to reflect that. Otherwise why bother with registers at
> >all?
>
>Because plain memory-to-memory operations are costly in terms of code
>size. We're talking 70s here. Memory was worth its weight in gold. You
>wouldn't want to waste at least 5 bytes per operation (2x 16bit address
>plus 1 byte opcode) when you can fit it in two (1 byte opcode, 1 byte
>src/dst operand register).

What's wrong with good old offset addressing, of the sort most 8-bit CPUs 
had from the days of even the 8080?

And why, if the design was that smart, why did TI's engineers then cripple 
it with an 8-bit external bus?

The whole thing seems like a classic case of wood for trees. One unusual 
architectural feature makes no sense on its own. You need everything around 
it to work too. All the way up to the s/ware support and marketing levels, 
which is another area where TI crashed and burned.

>Besides, as already mentioned otherwise, the design of the TMS9900
>allowed for fast context switches. With other architectures you always
>had to go through a push/pull orgy

Yes, but how often did you use time sharing on a processor designed for use 
in a home micro?

>Concerning your other posting where you state that you like to have
>"unused MIPS to play around" may I nitpick that MIPS are nothing.

No, in this case MIPS were a useful metaphor.

I could have said grunt, but that would have been silly. :-)

Richard