[sdiy] Re: Bottom Ten ICs

[Rainer Buchty]

>It was architecturally stupid because if you're going to make no
>distinction between RAM and registers you might as well design the
>architecture to reflect that. Otherwise why bother with registers at
>all?

Because plain memory-to-memory operations are costly in terms of code
size. We're talking 70s here. Memory was worth its weight in gold. You
wouldn't want to waste at least 5 bytes per operation (2x 16bit address
plus 1 byte opcode) when you can fit it in two (1 byte opcode, 1 byte
src/dst operand register).

Besides, as already mentioned otherwise, the design of the TMS9900
allowed for fast context switches. With other architectures you always
had to go through a push/pull orgy.

>And in terms of speed it's always faster to do operations like compares
>and arithmetic on internal registers because you don't need an external
>fetch cycle.

That, again, depends on your architecture and the speed of RAM. If RAM
compared to processor speed is fast enough to provide data within the
very same cycle than nothing speaks against using RAM instead of
registers.

Internally, the processor will also literally address registers. That
special RAM area is called register bank and usually resides inside the
CPU, but given fast enough RAM (or slow enough CPU) it might well be
placed outside.

Concerning your other posting where you state that you like to have
"unused MIPS to play around" may I nitpick that MIPS are nothing. You
can have architectures providing great MIPS numbers but still showing
inferior performance compared to other architectures with not so great
MIPS numbers but -- due to a proper instruction set architecture
overall -- work better/faster.

Not to mention other architectural influences like pipelining side
effects (stalls, bubbles, flushes).

Rainer