[sdiy] 4069 VCO again

[René Schmitz]

Hi JBV,

> - I didn't found anything about stability & calibration...
> any clue ?

Calibration is like with any other VCO. The usual "two steps forward and 
one step back"... (Use two reference tones 1 oct apart, bring it to 
zero-beat with the low tone, with the circuits tune pot, then tune again 
to the high tone using the v/oct trimpot, while applying a 1V input. 
Repeat until the 1V step does produce the desired octave step.)

Well, I have not made any serious tests with regard to the stability.
But my guess is that you could improve it with a expo which employs a 
monolithic dual, instead of the glued-together transistors.

> - I was wondering how this little thing would behave
> in a polyphonic context (several such VCOs in parallel)...
> any risk to see them lock together ? decoupling issues ?

I would recommend to use seperate supply regulators to keep soft sync to 
a minimum. The CMOS has large current drain when transitioning, so there 
is some chance for syncing. (As with any circuit with a non constant 
current drain.)

> - how to modify it to accept 1V/oct VC from a uC + DAC
> + SH expo converter ? I guess it'll make the circuit even
> simpler...

That depends on how you want to implement it of course. Beware though, 
that the integrator current is sunk into Ub/2 and not GND, which makes 
this a somewhat challenging.

Cheers,
  René

-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159