Fw: [sdiy] Spartan 3 eval... FPGAs for s-diy?

[Paul Maddox]

Assi/Jaroslaw,

I did start a small page ;- 
http://www.fpga.synth.net/

Seems to have died of late though...

Paul


----- Original Message ----- 
From: "ASSI" <Stromeko at compuserve.de>
To: <synth-diy at dropmix.xs4all.nl>
Sent: Monday, March 15, 2004 9:21 PM
Subject: Re: Fw: [sdiy] Spartan 3 eval... FPGAs for s-diy?


> On Monday 15 March 2004 21:05, Jaroslaw Ziembicki wrote:
> > is there anyone who built anything for sound generating/processing
> > based on an FPGA?
> 
> Back at the university I was in a group doing research on 
> reconfigurable computing. For audio applications we've had an LPC Codec 
> and several FFT kernels on a dynamically reconfigurable CPU built on an 
> XC6200 (R.I.P.) to compare with implementations of the same on 
> commercial DSP and general purpose CPU. The CPU core in the FPGA was a 
> very modest RISC (to save gates) plus a reconfigurable computation unit 
> that would execute customized instructions tailored to each algorithm.
> 
> > I've been playing with Altera MAX PLUS II for 2-3 weeks now and I can
> > see that the possibilities are enormous. Even with FLEX10K family
> > members with 10,000 to 50,000 gates it's possible to create a pretty
> > signal processor
> > (example: 16x16 multiplier, 32 bit adder, 256x16 RAM, 1024x32 ROM -
> >  - and it all fits into a half of an EP1K50).
> 
> The key to getting good DSP performance from an FPGA is to max out all 
> resources. In a DSP you typically waste a considerable number of cycles 
> waiting for pipeline hazards to clear or data from memory to come in. 
> Then there are always some functional units that are mostly unused. 
> Only if you don't do the same thing in an FPGA you get better 
> performance, but this is quite hard to achieve. Minimizing the clock 
> cycle time also often requires to switch to serial arithmetic and/or 
> redundant number systems, but this is getting easier with the advent of 
> dedicated multiplier resources in FPGA. FPGA based systems used to be 
> good on doing things in parallel, but there's now a number of DSP based 
> on SIMD and MIMD principles that squeeze out that particular advantage.
> 
> > Any experiences? Reverb simulation? Polyphonic synths? Real time FFT?
> 
> I'm still researching the options as far as eval boards go. Also, for 
> the latest slew of design software it looks like I need a new computer 
> as well... My plan is to get a modernized version of the WAVE ASIC plus 
> perhaps some LFO and envelope generators into an FPGA.
> 
> 
> Achim.
> -- 
> +<[Q+ * Matrix-12 * WAVE#46 * microQkb/Omega * XTk/30 * sonic heaven]>+
> 
> SD adaptation for Waldorf rackAttack V1.04R1:
> http://homepages.compuserve.de/Stromeko#WaldorfSDada
> 
> 
>