[sdiy] Re: VCO reset time for BBD-based PM

[Magnus Danielson]

From: "JH." <jhaible at debitel.net>
Subject: [sdiy] Re: VCO reset time for BBD-based PM
Date: Thu, 3 Jun 2004 02:15:15 +0200
Message-ID: <001a01c448ff$e7d01290$477fb9d9 at jhsilent>

> > The fastest expo VCO I ever did is the one that is the clock VCO used in
> > the three phase generator. It goes up to 500kHz. I guess with a faster
> > gate you could push this a little further.
> 
> I think my storm tide flanger clock VCO goes over 1MHz, but it's ben some
> time since I
> measured it. Tracking is not overly good, though, and it does need some
> hefty HF compensation.
> http://home.debitel.net/user/jhaible/jh_storm_tide_1.pdf
> 
> > However, I wouldn't rule out PLLs. You could use a "tracking" loop
> > filter. (so that settling time does depend on pitch and not on the
> > lowest frequency) and use a guiding VCO that runs some octaves above the
> > normal range (so you get quicker locking). Then you can use a not so
> > precise exponential VCO as the VCO inside the loop (you can then track
> > its control voltage to the guiding VCO.) The loop is then not doing the
> > entire work of steering the high frequency VCO, but only generating an
> > error term which is dependant on the amount of mistracking. This should
> > result in smaller settling transients.
> 
> Interesting! Do you have a circuit example for this?

I would tap the expo-pairs for a little side-current, like by adding a current
mirror or possibly adding another transistor, and then use that to control
an OTA that replaces the resistor in the loop filter. Just att a cap on the
output of the OTA and a buffer and you are in game. Choose capacitor for
suitable loop filter property. Pretty much school-book stuff for us guys I
think.

PLLs are great, you just needs to figure out how to take them where you want
them. It might need to take some mind (and possibly circuit) bending to get it
there, but that's half the fun, so why not? ;O)

Cheers,
Magnus - bent