[sdiy] Filter Structure Question

[René Schmitz]

Hi Magnus, Scott, Harry and all,

> I *did* recommend there to be a cap there, and Scott has included that into
> his schematic. Now, a cap isn't regulated power, but it is the local energy
> reservoir and will reduce the effect. 

The cap doesn't really cut it either. The problem lies at DC. Consider
this: The current consumption is higest when the gate input is halfway
between the rails, aproximately linearly decreasing as it approaches
either rail. What this means is that the supply voltage of the chip is
lowest when the signal presented is small, as then only small excursions
from the quiescient point take place. As you increase the levels, less
current flows (on the average) and the supply voltage rises. I suspect
it could result in a dynamics expansion in a gain stage, since the gain
is also dependant on the supply voltage. What happens in an integrator
(or the suggested variant) would need to be closely examined. I would
suspect that this expansion effect in one of the stages of a filter
could result in a pretty aprupt way that self oscillation is reached.


>Also, in this case we should not look at
> it as being gates but rather inverting amplifiers. 

Oh, believe me I do, even if I write "gate"... Its gates acting as
inverting amplifiers...

> In the case that one wants
> isolation, then separating the amplification over several chips, each with its
> individual powersupply and capacitor would be possible. 

Yes, but pretty wasteful.

Cheers,
  René

-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159