[sdiy] Filter Structure Question
Scott Gravenhorst
music.maker at gte.net
Sat Jul 17 15:29:37 CEST 2004
Magnus Danielson <cfmd at bredband.net> wrote:
>From: Scott Gravenhorst <music.maker at gte.net>
>Subject: RE: [sdiy] Filter Structure Question
>Date: Fri, 16 Jul 2004 20:59:54 -0700
>Message-ID: <200407170359.i6H3xsZ22023 at linux6.lan>
>
>> Yeah, I know it looks strange, but there's no connection between that ground
>> and any power supply common. That "floating" inverter isn't really unused.
>
>It IS used, alot! It's part of the powersupply setup! ;O)
>
>> It creates a signal ground approximately halfway between the 4069UB Vss and
>> Vdd pins. If a symmetrical CMOS inverter has it's input connected to it's
>> output, the output seeks a voltage approximately halfway between the Vss and
>> Vdd pins. It creates a center reference between the IC power rails which is
>> why it is used as a signal ground. In this case, the ground point sits
>> about 2.5 volts away from either rail (which are at 0volts and 5volts).
>
>Right, the input is driven from the output in order to selfbias on the
>reference level whatever it is in that particular device. This feedback also
>uses the gain of the inverter to stabilize the output in relation to the load.
>This is equalent to an op-amp with the reference voltage at it's pos input and
>the output hooked to it's neg input, i.e. a buffer configuration. The only
>thing is that the gain of the inverter is much less than the open loop gain of
>an op-amp. It's a crude approximation, but hey, that's half the fun! ;O)
>
>> This was a suggestion from Magnus to avoid problems with the virtual ground
>> of the summing nodes created by the integrators. Doing this allows me to
>> reference my CV signal to that ground so that it properly influences the
>> gate of the MOSFET feeding current to the integrator.
>
>Exactly.
>
>> Magnus's last comment was that I was "bloody close", so there still may be
>> something I don't yet understand. I didn't really understand his comment
>> about using a dual supply, I don't know what that would be necessary.
>
>If you have a floating single-ended supply you are fine as long as you only
>drive THAT 4069UB with it. Hook up another one and it has a different view on
>where the bias-point shall be. What I wanted to propose was a way to handle the
>situation where you have potentially many of these in a design. Doing a bread-
>board test of a single one won't give away the difference. What you could do is
>to self-bias the inverters of a number of 4069UBs and measure their bias-level.
>I expect them to vary between chips, especially from different batches or even
>different fabs. When you compare within a chip you would probably not see very
>large differences, since they have virtually the same doping characteristics,
>but differences are there from geometry of individual design instances.
Ok, I see what you're saying about different chips having different gains and
other characteristics that would change where the virtual ground point would sit
from one chip to another.
I think I now understand what to do to fix it for more than one chip in a
system, please bear with me as I try to articulate it. It took sleeping on this
to see what you were giving me, and it's pretty cool.
We would use a dual supply as you suggest, which has it's own natural ground
point. This ground point is then connected to the pseudoground that the
"special" inverters want to make and each chip in the system has one inverter
that is used this way. This is the real reason for those resistors that feed
power to the chips, each chip has it's own set of power feed resistors. Now
what happens is that instead of the signal ground floating around as in my
single supply, single chip method (which I believe doesn't really need the
resistors) the IC's internal power rails (Vss and Vdd pins) float around
instead. So ground then will be ground, because all the grounds, created and
real, are all connected but Vss and Vdd at each chip will differ somewhat.
Whew. Thanks, I think I get it now.
This is very good information, and I shall keep it tucked away. I believe my
first experiments will use the single supply method, because at present, it
looks as if I can implement the whole filter with one 4069UB. For my studio,
this filter will be a self contained, self powered box that I can use with
either of my FatMan synths, or use with a guitar. One of the reasons I wanted
to use a single supply was to keep the total supply voltage rather low making
overdrive easier.
>> I'm going to throw this at a solderless bread board tomorrow and see what
>> happens. Maybe I'll find out...
>
>Keep us posted, I am eager to learn how it goes.
You bet.
>And yes, I had my HP and LP outputs swapped. Since the two stages are
>integrating, the lowpassiest output should be the last in the chain, and the
>feedback will with the summation of the input create the highpass function
>naturally. Sorry for the confusion, I was typing away from memory, which was
>obviously flawed.
Another Whew!
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