[sdiy] website update - VC-Delay

[WeAreAs1 at aol.com]

In a message dated 7/15/04 7:41:25 AM, np at inverse-entertainment.de writes:

<< Ryan's circuit made me think.... I doubt that the delay chip does any 

complicated acesses to the ram: Most probably it just alternates between 

write a byte and read a byte.. maybe even with a fixed address offset or 

no offset at all.


If we would ignore the internal address-logic of the chip and roll our 

own we could make the delay time as small as we would like to, right? 

Can't be that complicated. I doubt we'll need much more than some 

counters and a binary adder.


So, does anyone knows the ram access pattern of the PT2395?  >>

I'm guessing that it simply accesses the RAM addresses in a serial fashion, 
that is, when in "Long delay" mode, it counts up from A0 until it gets to A8, 
then starts counting again at A0.  I can't imagine why they would count through 
the addresses in any other way.  If that is the case, then what needs to 
happen is to let the controller chip count up from A1 to, say, A4, then simply 
re-route the higher-order addresses (A5 through A8) through 2-in, 1-out switches 
of some type (74hc157?) back to those four lower-order RAM address inputs.  Of 
course, it's not quite as simple to do this as I'm making it sound, 
especially if one wants to be able to switch back to Long Delay mode, but I think you 
get the idea.

Alternatively, you could probably also extend the delay time by adding an 
additional RAM chip and using the CAS inputs of the two RAM chips to select which 
chip is active.  You would run the CAS output of the controller through a 
1-in, 2-out switch (or a flip-flop?) and toggle between its two outputs by using 
the highest-order address bit (A8) to change the state of the 2-way switch.  
Thus, every other time the controller counts to A8, the CAS signal will get 
routed to the alternate RAM chip, leaving the other chip deselected until the 
next A8 comes up.  This would effectively double your current delay time.  You 
could extend this technique further to add more RAM chips.  This is how it's do
ne in some of the older Roland digital delays that use that great Roland delay 
controller IC from the 80's (SDE-3000/1000/2500/DD-2/DD-3/etc.).  BTW, it 
would probably be easier to do this than to reduce the delay time (requires les 
external parts and logic).  Yes, I know I'm not explaining this as clearly as I 
might, but hopefully, the basic concept is understood.  Comments?

Michael B.