[sdiy] Re: 4007 Voltage Controlled State Variable Filter (off list)

[Magnus Danielson]

From: ASSI <Stromeko at compuserve.de>
Subject: Re: [sdiy] Re: 4007 Voltage Controlled State Variable Filter (off list)
Date: Tue, 17 Feb 2004 23:03:04 +0100
Message-ID: <04021723030404.00645 at Robert>

> On Sunday 15 February 2004 19:26, Scott Gravenhorst wrote:
> > OK, I get this, but is the gate effect any different on the D-S
> > conductivity (or dynamic resistance) when the D-S bias is reveresed?
> 
> If the substrate connection is not tied to either terminal the 
> individual MOSFET in a CMOS technology really doesn't care what you 
> call its drain or source. Things are different for high-voltage and 
> power MOSFET which have asymmetrical doping and/or diffused channels 
> (DMOS).

Yeah, I've long known this, but what is the main reason that we don't see these
4 pins on trannies. Naturally the substrate pin needs to be on the right side
of the two S/D D/S pins (due to control-voltage and inherent NP junctions need
to be in reverse) but I could live with that. Is it just that it isn't so
usefull or perceived usefull as I think?
(I think there might be use for such a FET).

What ugly trick do you do up there on the chip when you do full-custom anyway?

Cheers,
Magnus