[sdiy] How does a DCO work?

[Rainer Buchty]

>> However, a phase accumulator osc can jitter!
>> Ask any Mirage or ESQ1/80 owner!
>
>hehe, yeah, a not very well designed one.
>The DOC chip in the mirage is, IMHO, trying to do too much, and this is
>where the Jitter comes in.
>But I'm sure Rainer will wish to pass comment ;-)

I don't understand this discussion. Aren't it especially those flaws
which give a machine "soul"? :-p

Joking aside, internal timing is effectively based on f(clk)/8, i.e.
1MHz, so I, so I don't think it's actually doing too much for early 80s
technology. (*)

It's probably just badly implemented.

Rainer

(*) What's taking the most effort when recreating it using FPGA
technology is the bit-shifting going on during wave address calculation;
I'm quite sure the original design just uses open-collectors and
wired-or thus avoiding any shifting or huge select logic.