Fw: [sdiy] Anybody using Atmel AVR?
Phil Harbison
alvitar at comcast.net
Wed Dec 22 19:45:50 CET 2004
john mahoney wrote:
> The 6502 might be capable of wavetable fun by virtue of its
> "Indexed Indirect" addressing mode. Or maybe the "Indirect
> Indexed" mode. The 6502 has both modes and I forget which
> is which.
Indexed Indirect: (nn + X)
Add the 8-bit address nn (upper address byte is zero) to the
contents of the X index register to compute the address of a
word in page zero which contains the address of the operand.
This is good for indexing into an array of pointers.
Indirect Indexed: (nn) + Y
The contents of bytes nn and nn+1 in zero page form a 16-bit
base address. Add the base address and the contents of the Y
index register to compute the address of the operand. This
is good for table lookups, frame pointers, etc.
IIRC, the 6809 added all of these addressing modes and more
to the original 6800 instruction set, as well as adding an
8x8 multiply instruction and the 16-bit D accumulator (the
concatenation of the 8-bit A and B accumulators) which was
first included in the 6801/6803. It also had 16-bit system
and user stack pointers which made it much more practical
to support the C language. I rewrote the code generator of
the Small C compiler to generate 6809 code and use the user
stack pointer as a procedure frame pointer. The resulting
machine code was much more compact that equivalent Z80 code.
My only complain with the 6502/6800/6809 was they used a low
speed clock equal to the memory cycle time (i.e. 1 clock tick
per memory access) while the 8080/Z80 used a higher speed
clock with 3 or 4 clock ticks per memory cycle. With a Z80
running at 4 MHz, a memory access can be extended with wait
states in increments of 250 nanoseconds. With the equivalent
6502 running at 1 MHz, you must extend it in increments of
1 microsecond. Presumably this makes it less beneficial to
pipeline the 6502/68xx since you have one fourth as many
clock edges on which to synchronize.
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