[sdiy] digital delay, was ...
john mahoney
jmahoney at gate.net
Wed Sep 10 02:38:45 CEST 2003
----- Original Message -----
From: "Harry Bissell Jr" <harrybissell at prodigy.net>
> Hah... since I am the worlds foremost proponent
> of BBD circuits... I'll suggest how to do this
> (ROTFLMFAO) ;^P
As the WFPOBBDC, do you like the currently available chips?
> Make a VCO that has a real frequency for zero volts
> and send an FM signal through the BBD. The CV is
> represented as frequency and the delay is the BBD
> clock. ...
This would act as a delay? I'm not getting it. I must be too digitally
brained. :-)
> ... If you used sine waves... I think you could
> do away with most of the anti-alias filters as well.
The need for filters is a function of the sampling rate and the bandwidth of
the devices downstream. Unless you are running square waves thru the BBD,
you may need an a-a filter. But hey, a plain old cap makes a simple low pass
filter, doesn't it? (Or do you also need a resistor?) A bigger guess: A cap
limits the slew rate, but that's not a big problem with an LFO. It's also
not a problem with a Gate or trigger, at least not in this case (where we
are delaying that signal in the first place) unless it's such a big cap that
the trigger is suppressed too much. Also, a real anti-alising filter has
some resonance around the ol' Nyquist frequency, but that would be overkill
in this circuit.
> Use a tachometer circuit for 'slow response' CV
> recovery... or a PV-1 Pitch to Voltage converter
> for faster response (two cycles of the FM
> frequency...)
I'm still trying to catch up! I think I get the tach circuit, but not the
PV-1 thing.
--
john (learning and spewing! thanks for the tolerance ;-)
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