[sdiy] OB Matrix 12 case

[Jaroslaw Ziembicki]

----- Original Message -----
From: "Paul Maddox" <P.Maddox at signal.qinetiq.com>
To: "Jaroslaw Ziembicki" <aon.912230836 at aon.at>
Sent: Friday, September 05, 2003 10:29 AM
Subject: Re: [sdiy] OB Matrix 12 case
> Jarek,
> >  I even built one single voice
> > board (Atmel AT90S1200 as a triple sawtooth DCO + saw-to-pulse
> > converters + Moog Rogue VCF).
> Hey, nice, I've been thinking about using the newer faster Mega8 to do
> sawtooth generation, but 3 oscs's is impressive!
> Do you have any details/schematics/code?
> Paul


As to the schematics:

I could send it as a JPG file. But where to? Is there any database
of "synth-diy"? I have no idea, I never tried to use it.

As to the AT90S1200 code:

A big part of it serves to the communication between a voice board
and the master controller.
I will describe the parts that have to do with the sound generating.
There is a sampling frequency clock (187.5kHz) which is fed into the
AT90S1200 external interrupt input.
The external interrupt service routine writes sample values of
three DCOs to a multichannel DAC (port B --> HCMOS buffer 573 -->
--> resistor ladder --> 4051 + TL084 as a sample & hold).
The 4051 MUX is connected as follows: addresses A/B/C = PD4/PD5/PD6,
ENABLE = PD3.
The DCO1 frequency can be set as follows:
a) calculate the phase increment D = D0 * Fvco / Fsampling
   where D0 = 2 raised to power 24.
b) load the result (a 24 bit number) into the registers
   PHASEDELTA1_L (low byte), PHASEDELTA1_M (mid byte), and
   PHASEDELTA1_H (high byte).
The DCO2 and DCO3 frequencies can be set in a similar way.

Registers:
PHASE1_L  EQU R0
PHASE1_M  EQU R1
PHASE1_H  EQU R2
PHASE2_L  EQU R3
PHASE2_M  EQU R4
PHASE2_H  EQU R5
PHASE3_L  EQU R6
PHASE3_M  EQU R7
PHASE3_H  EQU R8
PHASEDELTA1_L  EQU R9
PHASEDELTA1_M  EQU R10
PHASEDELTA1_H  EQU R11
PHASEDELTA2_L  EQU R12
PHASEDELTA2_M  EQU R13
PHASEDELTA2_H  EQU R14
PHASEDELTA3_L  EQU R15
PHASEDELTA3_M  EQU R16
PHASEDELTA3_H  EQU R17
MUXDISABLE  EQU R18 ;load with 00001110b prior to enable interrupts
R_INT0  EQU R19 ;\
R_SREG  EQU R20 ;/ used in INT0 service routine only

Interrupt services:
  ORG 0
  rjmp RESET  ;0x000 RESET
  rjmp INT_EXT0 ;0x001 INT0
;---------------------------------------------------------------------------
--
; External Interrupt Service Routine
;---------------------------------------------------------------------------
--
;Uses:  R_INT0,R_SREG
;---------------------------------------------------------------------------
--
INT_EXT0: in R_SREG,SREG  ;save status reg
  out PORTD,MUXDISABLE ;MUX = off
    ;set DAC1, increment DCO1 phase:
  ldi R_INT0,00000110b
  out PORTB,PHASE1_H  ;DCO1 --> DAC
  add PHASE1_L,PHASEDELTA1_L
  adc PHASE1_M,PHASEDELTA1_M
  adc PHASE1_H,PHASEDELTA1_H
  out PORTD,R_INT0  ;MUX = channel 0
    ;set DAC2, increment DCO2 phase:
  ldi R_INT0,00010110b
  out PORTD,MUXDISABLE ;MUX = off
  out PORTB,PHASE2_H  ;DCO2 --> DAC
  add PHASE2_L,PHASEDELTA2_L
  adc PHASE2_M,PHASEDELTA2_M
  adc PHASE2_H,PHASEDELTA2_H
  out PORTD,R_INT0  ;MUX = channel 1
    ;set DAC3, increment DCO3 phase:
  ldi R_INT0,00100110b
  out PORTD,MUXDISABLE ;MUX = off
  out PORTB,PHASE3_H  ;DCO3 --> DAC
  add PHASE3_L,PHASEDELTA3_L
  adc PHASE3_M,PHASEDELTA3_M
  adc PHASE3_H,PHASEDELTA3_H
  out PORTD,R_INT0  ;MUX = channel 2
  out SREG,R_SREG  ;restore status reg
  reti
There was some additional stuff in the interrupt service routine:
- service of another five DAC channels on the board, for setting
  PW modulator levels, VCF and VCA,
- communication with the master controller which received MIDI messages
  and sent the voice parameters to all voice boards.
I removed this stuff for clarity.

I hope it helps, at least for someone with some knowledge on AVR family.

Regards
Jarek

P.S. Sorry that the pretty structure of my source code has been distroyed...