[sdiy] VCO and expo converter question

[René Schmitz]

Hi Roman and List,

> Well, it's simple CMOS inverter, 2 transistors designed to work fully
> closed or open, where nobody cares for their cutoff voltage, leakage
> and temperature dependence. I simply wouldn't call it a stable analog
> component. I'd expect big temperature drifts, and poor EMI immunity. 
> However, I have no experience using 4069 in analog way, I only have
> strong feeling this is way out of "precision" league.

You're absoulutely right, these are very poor in their DC specs.
But that doesn't say one can build something useful out of them.

And in the schmitt trigger the gates are really used in a digital way. 
The possible drifts of the threshold voltages of the transistors would 
affect both thresholds equally, so the hysteresis would stay the same.

That leaves the integrator. We had a debate about that some time ago, 
and I mentioned this as a "pathological case" for study. I don't see at 
the moment how drifting of the threshold voltage of the inverter 
transistors would affect anything besides DC offset. Leakage is another 
matter, and I think the tuning curve speaks towards

> So you say 4069 VCO core works as good as opamp one?

No, but I do not say it won't. Its neither state of the art nor total 
crap. And I think some would be surprised what you get out of it. I was 
at least.

Cheers,
  René

-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159