[sdiy] SVF problems

patchell patchell at silcom.com
Sat May 3 05:32:47 CEST 2003


    If you look at the below circuit at the Q feedback loop, you will note that one is
a negative feedback loop...becasue there is an OTA in the circuit with the signal going
through the negative input, makes this one negative feedback, the previous circuit, had
only two opamps in the loop with the signal going through the negative inputs...making
positive feedback.  For the SVF, this loop does need to have negative feedback...the
more feedback, the higher the damping, thus lower Q.

    I can't really talk, back in 1980 I had a major mistake published in
Polyphony...real embarassing.

Scott Bernardi wrote:

> Ummm... isn't that the idea of the resonance feedback loop? It's a bit of frequency
> dependent positive feedback, and that's what causes the corner peaking.  And that's
> why you also often have to place some sort of limiters like back to back diodes
> parallel to the pot (for example, see the ASM-1 VCF
> http://home.swipnet.se/cfmd/synths/friends/stopp/asm1vcf.new.pdf, which has the
> same polarities as the SVF but has a limiting diodes also).
> That may be the problem. Question: if you turn the Q pot all the way down so it
> feeds no signal back, do you still get the distortion?
>
> patchell wrote:
>
> >     That circuit won't work as drawn...there is a positive feedback loop around
> > U1 and U2 through the Q pot....Move R5 from the Negative input of U1 to the
> > Positive input, and it should work....
> >
> > Stephen Begin wrote:
> >
> > > I'm trying to put together this little circuit from Magnus's page
> > >
> > > http://home.swipnet.se/cfmd/synths/schematics/svf1.pdf
> > >
> > > and I've tried twice on breadboard, and both times i end up with a signal
> > > that is so distorted it's hard to tell if the filters are even working, and
> > > for about 9/10th of the range of the pots, i get no signal at all.
> > >
> > > I'm really not very experienced here so i'm wondering if maybe there is
> > > something that is assumed in this schematic that i don't know
> > > of...basically, I got the pinouts for the two chips, and made the
> > > appropriate connections (or tried).  Are there supposed to be power supply
> > > bypass caps or anything like that?
> > >
> > > Also, forgive me for even asking, but does the p1a and p1b mean it's a dual
> > > pot?
> > >
> > > Thanks,
> > > Steve
> >
> > --
> >  -Jim
> > ------------------------------------------------
> > * Visit:http://www.silcom.com/~patchell/
> > *-----------------------------------------------
>
> --
> Scott Bernardi
> sbernardi at attbi.com

--
 -Jim
------------------------------------------------
* Visit:http://www.silcom.com/~patchell/
*-----------------------------------------------




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