[sdiy] FIFO as memory buffer

[patchell]

    I have used FIFO's...in general, they way you want to use them, two
would be easier if you want two way communication...Dual Port RAM is
also an alternative, although, I have never used it like that...Dual
port rams still need arbitration to prevent writing to the same address
from both sides...a simple hardware semaphore could be used.

    I was wondering if your really need a deep FIFO...a lot of time I
have seen this done with a 1 deep FIFO (a register) and some interrupt
logic...I wish I could remember where I just recently saw an
implementation of this scheme.

jbv wrote:

> Does anyone have any experience using FIFO RAM
> as memory buffer between 2 microcontrollers ?
>
> I'm presently brainstorming on a project featuring
> 1 uC as master and several other uCs as slaves.
> The master would pass data to slaves through a
> memory buffer (1 for each slave), and would then
> collect results through the same buffer.
>
> FIFO Ram looks like a perfect candidate for such
> a function, and I've found several datasheets
> (Cypress for instance).
>
> But the problem is that FIFO works great when
> communication happens in 1 direction only (for
> instance master -> slave).
> Things get more complex when the same FIFO
> is supposed to be used in both directions...
> In my project, reading & writing times will never
> overlap (neither for master nor slave)...
>
> Of course, I could probably find a solution by
> adding bi-directional buffers and a few logic gates
> to the FIFO...
> But I was wondering if there were any FIFO chip
> that would reverse i/o with only 1 control pin...
> And in DIL package if possible...
>
> Am I asking too much ?
>
> Thanks,
> JB

--
 -Jim
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