[sdiy] beginners question about logic ics

[Scott Gravenhorst]

Generally, with logic, there is a "no mans land" between the two states of
high and low, especially with TTL.  Your example is CMOS and that works a
bit differently.  Someone will correct me if I'm wrong, but I believe that
the dividing line between high and low is 1/2 the supply voltage or so I
have seen in practice.  If an input is above 1/2 Vdd, then it tends to
represent a high, if below, it tends to represent a low.  The spec sheet
shows that the voltage should be about 80% of Vdd or higher for a high and
20% of Vdd or lower for a low, however, in practice, I've seen it
consistently switch high at just above 50%.  The spec sheet's 20% and 80%
margins are for "guaranteed" levels of high and low.  The actual level may
vary from chip to chip and mfr. to mfr.

Also, the 4069UB is an interesting beast that can be used in a limited way
as an analog amplifier.  See the data sheet for details.

Sven Windisch <mai00fpz at informatik.uni-leipzig.de> wrote:
>hi there.
>
>i wondered about the following:
>
>if i take some logic ic (let's say 4081, 4 AND gates) and set it up with n
>volts as dcc and IN1 with a Volts and IN2 with b Volts, so that IN1 and
>IN2 are set to HIGH and OUT1 would go high. what would the output be in
>volts? n, a, or b? or something very different?
>
>confused,
>sven.
>
>-- 
>To some ears, "computational philosophy of science" will
>sound like the most self-contradictory enterprise in
>philosophy since business ethics.
>[Paul Thagard in "Computational Philosophy of Science"]
>

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