[sdiy] Temperature compensation results

Czech Martin Martin.Czech at micronas.com
Wed Jun 11 10:31:42 CEST 2003


Ian,

finally someone comes up with the question of offset voltage
in the transistor pair and if it is perhaps usefull, or
harmfull to the stability.

My observation is that across a few cm 0.4C temperature difference
can exist even with forced air motion and thus heat exchange.
I'd expect (have no measurements) that in the real application
the temperature difference will be larger, depending on board orientation
faceplate and everything else. There may be even draft or convection
inside the instrument.

The dual transistor expo circuit is a local approach, i.e. the reason
of drift is known to be the transistor, so another transistor
is integrated, or glued to that very source of error in order
to compensate. In the next level a tempco resistor is glued
to the pair in order to kill the remaining effect.
This works quite well, because it is quite well known what is happening.

I *assume* that a non local compensation approach (i.e. compensation
circuit not near to physical thermo process that you want to compensate,
and perhaps physically not even related to the bunch of residual tempcos
in the circuit) will suffer from such temperature gradients.
I could imagine that even the sign of compensation may be wrong
under certain circumstances.

So I wonder if a drift in the range of 10ppm/K is really possible.

I have seen that HAM people use heavy thermal isolation outside
and inside heavy heat conduction (aka metal). Very thick walls
of metal in order to supress any temperature gradient. Thus they
can e.g. cancel copper coil tempco with capacitor tempco without
glue once the system has reached equilibrium. This can take a while...


?

m.c.



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